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Unique ID:
#6498
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Price:
$
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Location:
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Posted on:
27th of May 2015 at 5:28 PM
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Expires in:
Expired
Start-up seeks Application Engineer to support simulation-based/verification products.
Minimum of 3 years of verification or design experience working with major Verilog simulation tools. Experience/knowledge using APIs such as PLI/VPI and knowledge of C/Verilog/VHDL /SystemVerilog with VMM/UVM. Knowledge of standard protocols such as AMBA, USB, PCIe, SATA, DDR, etc essential. Candidate will have good debugging simulation (gate simulation) for ASIC’s with the major vendors, VIP knowledge having supported or worked with VIP for protocols such as AMBA, PCIe, USB, SATA, DDR, MIPI, etc. Added bonus, candidate will have worked for the majors (Synopsys, Cadence, Mentor).
Please apply: https://www.techjobscafe.com/jobs_display.php?company_id=2784&job_id=8441 •Principals only. Recruiters, please don’t contact this job poster.
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