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Unique ID:
#6369
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Price:
$
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Location:
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Posted on:
17th of May 2015 at 7:01 PM
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Expires in:
Expired
At GainSpan, we’re helping to shape tomorrow’s Internet of Things. . . now. Our wireless innovations are connecting all the “things” around us, enabling cool new products–products people once couldn’t have imagined and now can’t imagine living without!
Our solutions–Wi-Fi chips, modules, software–make connected devices easier to develop, faster to get to market and simpler to set-up and install. For the Smart Home and Smart City. For the Connected Building. For Health/Fitness. For Automotive. For Connected Entertainment. You’ll find our solutions everywhere–in weight/BMI scales, heart rate monitors, thermostats, door locks, air conditioners, refrigerators, security cameras, and wireless speakers to name just a few.
A spin-off of Intel, we’re backed by top VC firms and strategic investors, and are partnered with leading MCU manufacturers, technology companies and service providers–all who share our vision.
Help shape the next 50 billion IoT devices with us!
What we have to offer is an opportunity to work with a team of exceptionally smart people, in a fast-pace and innovative environment. We are engineers, scientists and business managers. We are from different countries and speak different languages. We come from diverse cultures and have unique perspectives. Together, we focus on a single goal–to help shape tomorrow’s Internet of Things.
If you want to be part of a team that often does what many thought was impossible — and have fun doing it — GainSpan is the place for you.
Summary:
GainSpan is seeking an experienced senior ASIC Design Engineer for digital design and verification of WLAN Phy and SoC functional blocks. Candidates should be self-motivated and thrive in an environment that values teamwork, results and creativity.
Reporting Relationship:
Reports to ASIC Design Manager.
Duties/Responsibilities:
The ASIC Design Engineer will work closely with the Systems, Software and RF/Analog teams to develop and enhance WLAN Phy technology for a low power Wi-Fi SoC. The engineer will be responsible for architecture, design and verification of 802.11 a/b/g/n Phy digital IP. The candidate will work closely with the verification and physical design teams to ensure proper validation and implementation of the design.
It is expected that the ASIC Design Engineer will:
•work with systems and analog teams to define/enhance Phy architecture
•implement and verify all RTL changes
•define and implement verification tests
•verify post routing timing and functionality
•engage in post silicon bring up
•define and help implement manufacturing tests
Qualifications:
The ASIC Design Engineer must be highly experienced with digital design in RTL. Candidate must have previous experience with 802.11 Phy design and/or verification.
Skills/Experience:
•Candidate must have strong experience with: •Verilog RTL design and verification
•Wi-Fi Phy design and/or verification
•802.11 protocol
•Working knowledge with C/C++
•Asynchronous clock domains
•Highly desired experience •Low power digital design
•Backend experience with synthesis, place and route and/or static timing
•Scripting and test automation
•Must have excellent analytical skills and be able to debug and solve complex technical problems.
•5+ years of experience and a successful track record of delivering high-volume designs in fast paced markets.
Education/Training Requirements:
M.S. or Ph.D. degree or equivalent experience
To Apply: http://chk.tbe.taleo.net/chk04/ats/careers/requisition.jsp?org=GAINSPAN&cws=1&rid=93
GainSpan is proud to be an equal opportunity employer.
•Principals only. Recruiters, please don’t contact this job poster.
•do NOT contact us with unsolicited services or offers